DEFINED_PHASES=install prepare
DEPEND=app-arch/bzip2 sys-libs/readline sys-libs/zlib
DESCRIPTION=A Verilog simulation and synthesis tool
EAPI=4
HOMEPAGE=http://www.icarus.com/eda/verilog/
IUSE=examples
KEYWORDS=~amd64 ~ppc ~sparc ~x86
LICENSE=GPL-2
RDEPEND=app-arch/bzip2 sys-libs/readline sys-libs/zlib
SLOT=0
SRC_URI=ftp://icarus.com/pub/eda/verilog/v0.9/verilog-0.9.5.tar.gz
_eclasses_=eutils	f99a767f569b1f0731b3a1edd17c1d11	multilib	3bf24e6abb9b76d9f6c20600f0b716bf	toolchain-funcs	0dfbfa13f57c6184f4728d12ac002aac
_md5_=97307d62830f741232d149053ac6732e