gentoo-full-overlay/metadata/md5-cache/sci-electronics/iverilog-0.9.6

13 lines
590 B
Groff

DEFINED_PHASES=install prepare
DEPEND=app-arch/bzip2 sys-libs/readline sys-libs/zlib
DESCRIPTION=A Verilog simulation and synthesis tool
EAPI=4
HOMEPAGE=http://iverilog.icarus.com/
IUSE=examples
KEYWORDS=~amd64 ~ppc ~sparc ~x86
LICENSE=GPL-2
RDEPEND=app-arch/bzip2 sys-libs/readline sys-libs/zlib
SLOT=0
SRC_URI=ftp://icarus.com/pub/eda/verilog/v0.9/verilog-0.9.6.tar.gz
_eclasses_=eutils d40dc948067bd3db1c8ebf7d51897313 multilib ded93e450747134a079e647d888aa80b toolchain-funcs 69a2016af67775a812f4c03ba4b0e03e user d0a4d0735a6c0183d707ca919bd72f28
_md5_=a48e41c06b89568e8979b1df276a2ecf