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13 lines
771 B
13 lines
771 B
BDEPEND=dev-util/gperf sys-devel/bison sys-devel/flex >=app-portage/elt-patches-20170815 || ( >=sys-devel/automake-1.16.2-r1:1.16 ) >=sys-devel/autoconf-2.69 >=sys-devel/libtool-2.4 >=dev-vcs/git-1.8.2.1[curl]
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DEFINED_PHASES=install prepare unpack
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DEPEND=sys-libs/readline:= sys-libs/zlib
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DESCRIPTION=A Verilog simulation and synthesis tool
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EAPI=7
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HOMEPAGE=http://iverilog.icarus.com https://github.com/steveicarus/iverilog
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LICENSE=LGPL-2.1
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PROPERTIES=live
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RDEPEND=sys-libs/readline:= sys-libs/zlib
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SLOT=0
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_eclasses_=autotools 4ba6c345bf49883c84d5fa5c9bf40c0b git-r3 3e7ec3d6619213460c85e2aa48398441 libtool f143db5a74ccd9ca28c1234deffede96 multilib d410501a125f99ffb560b0c523cd3d1e toolchain-funcs 24921b57d6561d87cbef4916a296ada4
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_md5_=53fe7f5f4565527a26b28a22c2a45c7c
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