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gentoo-overlay/metadata/md5-cache/sci-electronics/iverilog-10.3

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Sync with portage [Sun Jan 5 20:52:57 MSK 2020].
5 years ago
BDEPEND=>=app-portage/elt-patches-20170815 || ( >=sys-devel/automake-1.16.1:1.16 >=sys-devel/automake-1.15.1:1.15 ) >=sys-devel/autoconf-2.69 >=sys-devel/libtool-2.4
DEFINED_PHASES=install prepare
Sync with portage [Tue Feb 18 18:18:13 MSK 2020].
5 years ago
DEPEND=dev-util/gperf sys-devel/bison sys-devel/flex sys-libs/readline:0 sys-libs/zlib
Sync with portage [Sun Jan 5 20:52:57 MSK 2020].
5 years ago
DESCRIPTION=A Verilog simulation and synthesis tool
EAPI=7
HOMEPAGE=http://iverilog.icarus.com https://github.com/steveicarus/iverilog
IUSE=examples
Sync with portage [Tue Jun 30 01:05:14 MSK 2020].
4 years ago
KEYWORDS=~alpha amd64 ~arm ~arm64 ~hppa ~ia64 ~m68k ~mips ppc ~ppc64 ~riscv ~s390 sparc x86
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5 years ago
LICENSE=LGPL-2.1
RDEPEND=sys-libs/readline:0 sys-libs/zlib
SLOT=0
SRC_URI=https://github.com/steveicarus/iverilog/archive/v10_3.tar.gz -> iverilog-10.3.tar.gz
Sync with portage [Sun Jun 14 21:16:51 MSK 2020].
4 years ago
_eclasses_=autotools 7d999b62b8749fad43fff00620cedf47 libtool f143db5a74ccd9ca28c1234deffede96 multilib 2477ebe553d3e4d2c606191fe6c33602 toolchain-funcs 605c126bed8d87e4378d5ff1645330cb
Sync with portage [Tue Jun 30 01:05:14 MSK 2020].
4 years ago
_md5_=e0d0d3128769a8fc437c0841081f815c