13 lines
784 B
Text
13 lines
784 B
Text
BDEPEND=>=app-portage/elt-patches-20170815 || ( >=sys-devel/automake-1.16.1:1.16 >=sys-devel/automake-1.15.1:1.15 ) >=sys-devel/autoconf-2.69 >=sys-devel/libtool-2.4 >=dev-vcs/git-1.8.2.1[curl]
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DEFINED_PHASES=install prepare unpack
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DEPEND=dev-util/gperf sys-libs/readline:0 sys-libs/zlib
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DESCRIPTION=A Verilog simulation and synthesis tool
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EAPI=7
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HOMEPAGE=http://iverilog.icarus.com https://github.com/steveicarus/iverilog
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IUSE=examples
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LICENSE=LGPL-2.1
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PROPERTIES=live
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RDEPEND=sys-libs/readline:0 sys-libs/zlib
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SLOT=0
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_eclasses_=autotools ea7865c8fba1ea8d3639f355fffe1a3c git-r3 809e27702c573cbba31c08ed00bbad33 libtool f143db5a74ccd9ca28c1234deffede96 multilib 1d91b03d42ab6308b5f4f6b598ed110e toolchain-funcs 512eb3367f507ebaa1d1d43ab7d66e6c
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_md5_=4611de40096aeefee1484ed1e55c1b3b
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