You can not select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
gentoo-overlay/metadata/md5-cache/sci-electronics/iverilog-9999

13 lines
831 B

BDEPEND=dev-util/gperf sys-devel/bison sys-devel/flex sys-devel/gnuconfig >=app-portage/elt-patches-20170815 || ( >=sys-devel/automake-1.16.4:1.16 ) >=sys-devel/autoconf-2.71 >=sys-devel/libtool-2.4 >=dev-vcs/git-1.8.2.1[curl]
DEFINED_PHASES=install prepare unpack
DEPEND=sys-libs/readline:= sys-libs/zlib
DESCRIPTION=A Verilog simulation and synthesis tool
EAPI=7
HOMEPAGE=http://iverilog.icarus.com https://github.com/steveicarus/iverilog
LICENSE=LGPL-2.1
PROPERTIES=live
RDEPEND=sys-libs/readline:= sys-libs/zlib
SLOT=0
_eclasses_=autotools 6cc26735fa9dd59e8c62880beda05b6e git-r3 cc875b0c1e9b3bdac1af0f82f3ba29da gnuconfig 262062cef0ba4f22b397193da514a350 libtool 241a8f577b9781a42a7421e53448a44e multilib de4beb52bfa93c4c5d96792a6b5e1784 toolchain-funcs badd6e329e1f3e6bee99b35bf8763ce8
_md5_=53fe7f5f4565527a26b28a22c2a45c7c